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data sheet rev. 1.2 1 2003-06-02 multifunctional voltage regula tor and watchdog tle 6363 data sheet p-dso-14-2 overview features ? step up converte r (boost voltage) boost over- and un der-voltage-lockout step down converte r (logic voltage) 2% output voltage tolerance logic over- and un der-voltage-lockout overtemperature shutdown power on/off reset generator digital window watchdog system enable output ambient operation temperature range ? 40 c to 125 c wide supply voltage operation range very low current consumption very small p-dso-14-2 smd package functional description general the tle 6363 g is a multifunctional power supp ly circuit especially designed for automotive applications. it delivers a programmable step up voltage (boost) and a precise 5 v fully short circuit protected output voltage (buck). the tle 6363 g contains a power on reset feature to start up the syst em, an integrated digital window watchdog to monitor the connected microc ontroller and a system enable output to indicate the microcon troller window watchdog faults. the device is based on infi neon?s power technology spt ? which allows bipolar and cmos control circuitry to be integrat ed with dmos power devices on the same monolithic circuitry. the very small p-dso-14-2 smd packages meet the application requirements. type ordering code package tle 6363 g q67006-a9601 p-dso-14-2
tle 6363 data sheet rev. 1.2 2 2003-06-02 furthermore, the build-in features like u nder- and overvoltage lo ckout for boost- and buck-voltage and the overtemper ature shutdown feature increa se the reliabi lity of the tle 6363 g supply system. pin definitions and functions pin no. so-14 symbol function 1r reference input ; an external resistor from this pin to gnd determines the reference current and the oscillator frequency 2ro reset output ; open drain output from re set comparator with an internal pull up resistor 3wdi watchdog input ; input for the watchdog control signal from the controller 4gnd ground ; analog signal ground 5 sen system enable output ; open drain output from watchdog fail-circuit with an in ternal pull up resistor 6buc buck-converter compensation input ; output of internal error amplifier; for loop-compensation connect an external r-c-series combination to gnd 7 v cc supply voltage output ; buck converter outpu t; external blocking capacitor necessary 8buo buck converter output ; source of the integrated power-dmos 9 v boost boost converter input ; input supply voltage of the ic; coming from the boost converter output voltage; buck converter input voltage 10 bds buck driver supply input ; voltage to drive the buck converter powerstage 11 ovl boost status output ; open drain output from boost pwm comparator 12 bofb boost converter feedback input ; connect boost voltage divider to this pin; internal reference is the bo ost feedback threshold v bofbth 13 bognd boost-ground ; power signal ground; so urce of boost converter power-dmos 14 boi boost converter input ; drain of the integrated buck converter power-dmos
data sheet rev. 1.2 3 2003-06-02 tle 6363 pin configuration figure 1 pin configuration (top view) r 8 ovl ro aep02960 11 12 13 14 buo 7 6 gnd 5 4 3 2 1 sen v boost 9 10 bognd buc wdi boi bofb bds cc v
tle 6363 data sheet rev. 1.2 4 2003-06-02 block diagram figure 2 block diagram aeb03008 12 bofb converter boost bognd boi 13 14 10 bds buck converter 8 9 buo boost v 7 cc v internal v 5 sen wdi 3 ro 2 ovl 11 window reset, and watchdog enable system gnd and oscillator generator reference current 1 r biasing ref v buc 6 boost v tle 6363 g 4
data sheet rev. 1.2 5 2003-06-02 tle 6363 note: stresses above those lis ted here may cause permanen t damage to the device. exposure to absolute maximu m rating conditions for ex tended periods may affect device reliability. absolute maximum ratings parameter symbol limit values unit remarks min. max. voltages boost input voltage v boi ? 0.3 46 v ? boost output voltage v boost ? 0.3 46 v ? boost feedback voltage v bofb ? 0.3 46 v ? buck output voltage v buo ? 1 46 v ? buck driver supply voltage v bds ? 0.3 48 v ? buck compensation input voltage v buc ? 0.3 6.8 v ? logic supply voltage v cc ? 0.3 6.8 v ? reset output voltage v ro ? 0.3 6.8 v ? system enable output voltage v sen ? 0.3 6.8 v ? current reference voltage v r ? 0.3 6.8 v ? watchdog input voltage v wdi ? 0.3 6.8 v ? ovl output voltage v ovl ? 0.3 6.8 v ? esd-protection (human body model; r = 1.5 k ? ; c = 100 pf) all pins to gnd v hbm ? 2 2 kv ? temperatures junction temperature t j ? 40 150 c? storage temperature t stg ? 50 150 c?
tle 6363 data sheet rev. 1.2 6 2003-06-02 note: in the operating range, the functions gi ven in the circuit descr iption are fulfilled. operating range parameter symbol limit values unit remarks min. max. boost input voltage v boi ? 0.3 40 v ? boost input voltage; (normal operation) v boost 535 v v boost increasing boost input voltage; (normal operation) v boost 4.5 36 v v boost decreasing boost input voltage v boost ? 0.3 4.5 v boost- and buck-converter off boost feedback voltage v bofb 03.0 v? buck output voltage v buo ? 0.6 40 v ? buck driver supply voltage v bds ? 0.3 48 v ? buck compensation input voltage v buc 03.0 v? logic supply voltage v cc 4.00 6.25 v ? reset output voltage v ro ? 0.3 v cc + 0.3 v ? system enable output voltage v sen ? 0.3 v cc + 0.3 v ? watchdog input voltage v wdi 0 v cc + 0.3 v ? current reference voltage v r 03.0 v? junction temperature t j ? 40 150 c? thermal resistance junction ambient r thj-a ?120k/w?
data sheet rev. 1.2 7 2003-06-02 tle 6363 electrical characteristics 8v < v boost < 35 v; 4.75 v < v cc < 5.25 v; ? 40 c < t j < 150 c; r r =47k ? ; all voltages with respect to ground; posi tive current define d flowing into pin; unless otherwise specified. parameter symbol limit valu es unit test conditions min. typ. max. current consumption current consumption; see application circuit i boost ?1.54ma i cc = 0 ma; i boload = 0 ma current consumption; see application circuit i boost ?510ma i cc = 200 ma; i boload = 50 ma under- and over-voltage lockout at v boost uv on voltage; boost and buck conv. on v bouvon 4.0 4.5 5.0 v v boost increasing; uv off voltage; boost and buck conv. off v bouvoff 3.5 4.0 4.5 v v boost decreasing uv hysteresis voltage v bouvhy 0.2 0.5 1.0 v hy = on - off ov off voltage; boost conv. off v boovoff 34 37 40 v v boost increasing ov on voltage; boost conv. on v boovon 30 33 36 v v boost decreasing ov hysteresis voltage v bouvhy 1.5 4 10 v hy = off - on over-voltage lockout at v cc ov off voltage; buck conv. off v buovoff 5.5 6.0 6.5 v v cc increasing ov on voltage; buck conv. on v buovon 5.25 5.75 6.25 v v cc decreasing ov hysteresis voltage v buovhy 0.10 0.25 0.50 v hy = off - on
tle 6363 data sheet rev. 1.2 8 2003-06-02 boost-converter; boi, bofb and v boost boost voltage; see application circuit v boost 24.0 27.5 31.0 v 5 ma < i boost < 100 ma; t j = 25 c 8 v < v batt < 16 v boost voltage; see application circuit v boost 23 ? 32 v 5 ma < i boost < 100 ma; 8 v < v batt < 16 v efficiency; see. appl. circuit ?80?% i boost = 100 ma power-stage on resistance r boon ? 0.6 0.75 ? t j = 25 c; i boi = 1 a power-stage on resistance r boon ??1.4 ? i boi = 1 a boost overcurrent threshold i booc 1.0 1.3 1.8 a ? feedback threshold voltage v bofbth 2.55 2.7 2.85 v v boi = 12 v i boost = 25 ma feedback input current i fb ? 2 ? 0.4 0 a2 v < v bofb < 4 v buck-converter; buo, bds, buc and v cc logic supply voltage v cc 4.9 ? 5.1 v 1 ma < i cc < 250 ma; see. appl. circuit efficiency; see. appl. circuit ?85? % i cc = 250 ma; v boost = 25 v power-stage on resistance r buon ?0.380.5 ? t j = 25 c; i buo = 1 a power-stage on resistance r buon ??1.0 ? i buo = 1 a buck overcurrent threshold i buoc 0.7 0.95 1.2 a ? input current on pin v cc i cc ?0.20.5ma v cc = 5 v electrical characteristics (cont?d) 8v < v boost < 35 v; 4.75 v < v cc < 5.25 v; ? 40 c < t j < 150 c; r r =47k ? ; all voltages with respect to ground; posi tive current define d flowing into pin; unless otherwise specified. parameter symbol limit valu es unit test conditions min. typ. max.
data sheet rev. 1.2 9 2003-06-02 tle 6363 buck gate supply voltage; v bgs = v bds ? v buo v bgs 5?10v? reference input; r (oscillator; timebase for boost- and buck-converter, reset and watchdog) voltage on pin r v r 1.3 1.4 1.5 v ? oscillator frequency f osc 85 95 105 khz t j = 25 c oscillator frequency f osc 75 ? 115 khz ? cycle time for watchdog and reset timing t cyl ?1.05?ms t cyl = 100/ f osc reset generator; ro reset threshold; v cc decreasing/increasing v rt 4.50 4.65 4.75 v v ro h to l or l to h transition; v ro remains low down to v cc > 1 v reset low voltage v rol ?0.20.4v i rol = 2 ma; 2.5 v < v cc < v rt reset low voltage v rol ?0.20.4v i rol = 0.2 ma; 1 v < v cc < v rt reset high voltage v roh v cc ? 0.1 ? v cc + 0.1 v i roh = 0 ma reset pull up current i ro ?240? a0 v < v ro < 4 v reset reaction time t rr 50 100 150 s v cc < v rt power-up reset delay time t rd ?64? t cyl v cc 4.8 v electrical characteristics (cont?d) 8v < v boost < 35 v; 4.75 v < v cc < 5.25 v; ? 40 c < t j < 150 c; r r =47k ? ; all voltages with respect to ground; posi tive current define d flowing into pin; unless otherwise specified. parameter symbol limit valu es unit test conditions min. typ. max.
tle 6363 data sheet rev. 1.2 10 2003-06-02 watchdog generator; wdi h-input voltage threshold v wdih ??0.7 v cc v? l-input voltage threshold v wdil 0.3 v cc ??v? watchdog period t wd ?128? t cyl v cc 4.8 v start of reset; after watchdog time-out t sr ?64? t cyl v cc 4.8 v reset duration; after watchdog time-out t wdr ?64? t cyl v cc 4.8 v open window time t ow ?32? t cyl v cc 4.8 v closed window time t cw ?32? t cyl v cc 4.8 v window watchdog trigger time t wd ?46.4? t cyl v cc 4.8 v system enable output; sen enable low voltage v senl ?0.20.4v i senl = 2 ma; 2.5 v < v cc < v rt enable low voltage v senl ?0.20.4v i senl = 0.2 ma; 1 v < v cc < v rt enable high voltage v senh v cc ? 0.1 ? v cc + 0.1 v i senh = 0 ma enable pull up current i sen ?240? a0 v < v sen < 4 v electrical characteristics (cont?d) 8v < v boost < 35 v; 4.75 v < v cc < 5.25 v; ? 40 c < t j < 150 c; r r =47k ? ; all voltages with respect to ground; posi tive current define d flowing into pin; unless otherwise specified. parameter symbol limit valu es unit test conditions min. typ. max.
data sheet rev. 1.2 11 2003-06-02 tle 6363 note: the listed characteristic s are ensured over the operat ing range of the integrated circuit. typical characteristics specify mean values expected over the production spread. if not otherwise specified, typical characteristics apply at t a = 25 c and the given supply voltage. boost status output; ovl enable low voltage v ovll ?0.20.4v i ovll = 1 ma; 2.5 v < v cc < v rt boost feedback threshold voltage; v ovlth 2.3 2.45 2.6 v see application circuit thermal shutdown (boost and buck-converter off) thermal shutdo wn junction temperature t jsd 150 175 200 c? thermal switch-on junction temperature t jso 120 ? 170 c? temperature hysteresis ? t ?30?k? electrical characteristics (cont?d) 8v < v boost < 35 v; 4.75 v < v cc < 5.25 v; ? 40 c < t j < 150 c; r r =47k ? ; all voltages with respect to ground; posi tive current define d flowing into pin; unless otherwise specified. parameter symbol limit valu es unit test conditions min. typ. max.
tle 6363 data sheet rev. 1.2 12 2003-06-02 circuit description below some importan t sections of the tle 6363 are described in more detail. power on reset in order to avoid any system failure, a sequence of several conditions has to be passed. in case of v cc power down ( v cc < v rt for t > t rr ) a logic low signal is generated at the pin ro to reset an external micr ocontroller. when the level of v cc reaches the reset threshold v rt , the signal at ro remains low for the po wer-up reset delay time t rd before switching to high. if v cc drops below the reset threshold v rt for a time extending the reset reaction time t rr , the reset circuit is activat ed and a power down sequence of period t rd is initiated. the reset reaction time t rr avoids wrong triggeri ng caused by short ?glitches? on the v cc -line. figure 3 reset function aet02950 l h ro v cc invalid rt v typ. 4.65 v < rr t < rd t start-up on delay invalid invalid on delay started stopped rd t rr t rd t t t power start-up normal failed n failed normal 1 v on delay
data sheet rev. 1.2 13 2003-06-02 tle 6363 watchdog operation the watchdog uses one hundred of the oscilla tor?s clock signal pe riod as a timebase, defined as the watchdog cycle time t cyl . after power-on, the rese t output signal at the ro pin (microcontroller reset) is kept low for the reset delay time t rd , i.e. 64 cycles. with the low to high transition of the signal at ro the device starts the closed window time t cw = 32 cycles. a trigger signal within this window is interpreted as a pretrigger failure according to the figures shown below. after the closed window the open window with the duration t ow is started. the open window lasts at minimum until the trig ger process has occurred, at maximum t ow is 32 cycles. a high to low transition of the watchdog trigger si gnal on pin wdi is taken by a trigger. to avoid wrong triggering due to parasitic glitches two h igh samples followed by two low samples (sample period t cyl ) are decoded as a valid tr igger. if a trigger signal appears at the watchdog in put pin wdi during the open window or a power up/down occurs, the watchdog window signal is reset and a new closed window follows. a reset is generated (ro goes low) if ther e is no trigger pulse during the open window or if a pretrigger occurs during the clos ed window. this reset happens after 64 cycles after the latest valid closed window star t time and lasts fo r further 64 cycles. the triggering is correct also, if the first three samples (two high one low) of the trigger pulse at pin wdi are inside th e closed window and only th e fourth sample (the second low sample) is taken in the open window. in addition to the micr ocontroller reset signal ro the device generates a system enable signal at pin sen. if ro is hi gh the system enable goes acti ve high with the first valid watchdog trigger pulse at pin wdi. the se n output goes low immediately if a pretrigger, a missing trigger or a power down reset occurs.
tle 6363 data sheet rev. 1.2 14 2003-06-02 figure 4 window watchdog definitions aet02951 f osc oscmin f cwmax cw ) = 22.4 ms = 32 ms - 0.1 x (32 ms + 64 ms) t wd owmin t owmin owmin t t 128 x results to: reset start delay time after window = 10% (oscillator deviation) = end of open window closed window = 32 x definition worst case osc f oscmax = f = t = t cw+owmin definition cw t ow (1 + t ? cw t = ( t + ) (1 - ) ? t ecw cyl owmin example with: t ? t = 1 ms t eow cyl open window cyl t ow t t = 32 x t sr cyl t = 64 x wd t = reset duration time after window watchdog time-out cyl t t wdr t = 64 x cyl watchdog time-out * * recommended watchdog trigger time aet02952 watchdog trigger signal valid not valid indifferent = watchdog decoder sample point ecw t closed window wdi wdi wdi open window eow t open window closed window
data sheet rev. 1.2 15 2003-06-02 tle 6363 figure 5 window watchdog function aed02945 cc v v rt t t ro a) perfect triggering after power on reset wdwi t t wdi sen cw ow cw ow cw cw rd t = 64 cycles 32 cycles 32 cycles system failed system enable system failed ro t b) incorrect triggering wdwi t wdi t sen t = 64 cycles t sr = 64 cycles sr t wdr t = 64 cycles = 128 cycles wd t 32 cycles cw ow cw ow cw cw ow ow 1) 2) 3) 4) pretrigger 1) incorrect trigger duration within watchdog 2) high t < 2 cycles incorrect trigger duration within watchdog < 2 cycles low t 3) missing trigger 4) legend: wdwi = internal watchdog window ow = open window (trigger signal at wdi) = closed window (trigger signal at wdi) cw x = sample point xx x x x x x x xx x x x x x xxx x xxx x x x x xx open window ow: open window ow: 1 t t t 2 t 3
tle 6363 data sheet rev. 1.2 16 2003-06-02 boost converter the tle 6363 contains a full y integrated boost converte r (except the boost-diode), which provides a supply voltage for an energy reserve e.g. an ai rbag firing system. the regulated boost output voltage v boost is programmable by a divider network (external resistors) providing the fe edback voltage for t he boost feedback pin bofb. the energy which is stored in the extern al electrolytic capacitor at v boost guarantees accurate airbag firing, even if the battery is disconnected by a car crash. the boost inductance l bo (typ. 100 h) is pwm-switched by an integrated current limited power dmos transistor with a programmable (external resistor r r ) frequency. an internal bandgap referenc e provides a temperature in dependent, on chip trimmed reference voltage for the regu lation loop. an erro r amplifier compar es the reference voltage with the bo ost feedback signal v bofb from the external divider network (determination of the output boost voltage v boost ). application note fo r programming the out put voltage at pin v boost : with a pwm (p ulse w idth m odulation) comparator the output of th e error amplifier is compared to a periodic line ar ramp, provided by a sawt ooth signal of the oscillator connected to pin r. a logic signal with va riable pulse width is generated. it passes through the logic circuits (set s the output latch pwm-ff) and dr iver circuits to the power switching dmos. the schmit t-trigger output resets th e output flip-flop pwm-ff by nor 2. the pwm signal is gated by t he nand 2 to guarantee a dominant reset. v boost v bofbth r bo1 r bo2 + () r bo2 ------------------------------------ - =
data sheet rev. 1.2 17 2003-06-02 tle 6363 figure 6 boost converter block diagram figure 7 shows the most important waveforms dur ing operation; for low, medium and high loads up to overload co ndition. the output transistor is switched off immediately if the overcurrent comparator de tects an overcurrent level at the power dmos or if the sense output switches to low induced by a v boost undervolta ge command. the tle 6363 is also protected against several boost loop errors: in case of a feedback interruptio n a pull up current source ( i fb typ. 0.4 a), integrated at pin bofb pulls the voltage at the feedback pin bofb above the reference voltage. the boost output is switched off by the high error voltage which controls the pwm-comparator at a zero duty cycle. in the case of a resistive lo op error caused by leakage currents to ground, the boost output voltage would increa se to very high values. in order to protect the v boost input as well as the external load against catastrophic failures, an overvoltage protection is provided which switches the output transi stor off as soon as the voltage at pin v boost exceeds the internal fixe d overvoltage threshold v boovoff = typ. 37 v. aeb02946 pin 1 r v min t f r t r t t oscillator v max v low t r t r f t high schmitt-trigger 1 ramp v t clock error-ramp error-signal pwm comp + - error-ramp error-signal h when < = v gnd 2.8 v ref error - + amp pin 12 bofb pullup i a 10 = gnd comp + - uv 4 v thuv v boost v gnd thov 38 v v = comp ov - + nor 1 1 & ov at l when boost v nand 3 l when > 175 ?c t j h when overcurrent h when < 4 v boost v h when > 175 ?c j t v or ov at boost nand1 & & error-ff & r q s q l when error nor 2 1 error h when error gate unlock detector nand 2 & q r & s q & pwm-ff h = off h = on 1 inv d-mos power gate driver + comp - oc v thoc 18 mv = sense 14.5 m r ? pin 13 bognd h when outputcurrent > 1.2 a ovl pin 11 gnd boi pin 14 boost status low if battery disconnected
tle 6363 data sheet rev. 1.2 18 2003-06-02 application note: a short circuit from v boost to ground will not destroy th e ic, however, it may damage the external boost diode or the boost inductance if there is no overcurrent limitation in that path. figure 7 most important waveforms of the boost converter circuit aed02672 t c v error v and v cv cp v t l h oclk pwm l h t t i boi boli i dbo i t boi v t boost v s v overcurrent threshold exceeded controlled by the load-current increasing with time; error voltage overcurrent comp controlled by the error amp
data sheet rev. 1.2 19 2003-06-02 tle 6363 buck converter a stabilized logic supply voltage (typ. 5 v) fo r general purpose is realized in the system by a buck converter. an external buck-inductance l bu is pwm switched by a high side dmos power transistor with t he programmed frequency (pin r). the buck regulator supply is give n by the boost converter output v boost , in case of a battery power-down the stored energy of the boost converter capacitor is used. like the boost conv erter, the buck converter uses the temperature compensated bandgap reference vo ltage (typ. 2.8 v) fo r its regulation loop. this reference voltage is connected to the non-inverting input of th e error amplifier and an internal voltage divider supplies the inverting input. therefore the ou tput voltage v cc is fixed due to the internal resistor ratio to typ. 5.0 v. the output of the error amplif ier goes to the inverting in put of the pwm comparator as well as to the buck co mpensation output buc. when the error amplifie r output voltage exce eds the sawtooth voltag e the output power mos-transistor is switched on. so the duration of the output transistor conduction phase depends on the v cc level. a logic signal pwm with variable pul se width is generated.
tle 6363 data sheet rev. 1.2 20 2003-06-02 figure 8 buck converter block diagram external loop compensation is required for converter stability, and is formed by connecting a compensation resist or-capacitor series-network ( r buc , c buc ) between pin buc and gnd. in the case of overload or short-circuit at v cc (the output curre nt exceeds the buck overcurrent threshold i buoc ) the dmos output transisto r is switched off by the overcurrent comparator imme diately. the pulse width is then controlled by the overcurrent comparator as seen before in the boost description. in order to protect the v cc input as well as the external load against catastrophic failures, an overvoltage protection is provided which switches the output tran sistor off as soon as the voltage at pin v cc exceeds the internal fi xed overvoltage threshold v buovoff = typ. 6.0 v. aeb02947 - + = thov v vcc3 r 39.7 ? vcc4 10.3 r ? gnd buc pin 6 pin 7 cc v 1.2 v v cc 2.8 v v - + ? vcc1 ? vcc2 28 r 22 r gnd = ref cc v error amp r prot1 ? 200 comp pwm + - error- signal r tt f t r max v min v t pin 1 r v high low v t t rf t r t error- ramp oscillator schmitt-trigger 1 h when error-signal < error-ramp & & r s q q l when > 175 ?c j t clock error-ff nor 1 1 h when ov at v cc l when overcurrent output stage off when h off when h ov comp & s nand 2 & q q & r pwm-ff 1 inv off on gate driver power d-mos boost driver supply bds pin 10 pin 8 buo comp uv + - h when uv at boost v = gnd thuv 4 v v gnd h = h = oc comp + - = 18 mv thoc v l when overcurrent pin 9 boost v r 18 m sense ? gnd ramp
data sheet rev. 1.2 21 2003-06-02 tle 6363 figure 9 most important waveforms of the buck converter circuit aed02673 t c v error v and v cv cp v t l h oclk pwm l h t t i buo buli i dbu i t buo v t boost v cc5 v overcurrent threshold exceeded controlled by the load-current increasing with time; error voltage overcurrent comp controlled by the error amp
tle 6363 data sheet rev. 1.2 22 2003-06-02 application circuit figure 10 shows the application circuit of the tle 6363 with the suggested external parts. figure 10 application circuit aeb03007 12 bofb converter boost bognd boi 13 14 10 bds buck converter 8 9 buo boost v 7 cc v internal v 5 sen wdi 3 ro 2 ovl 11 window reset and watchdog enable system gnd and oscillator generator reference current 1 r biasing ref v buc 6 boost v bo v batt l c 10 f c 220 nf 36 v zd1 s d 1 2 l 100 h d bo boost c 220 nf bo2 r bo1 r bo1 c 4700 f bo2 v d ? 100 k 10 k ? 10 nf bo1 c 10 nf c bot boload i buc r 47 k ? 470 c buc 47 k ? r r 4 c 220 nf c bu1 100 f bu2 bu l bu 220 h d 10 k ? system enable trigger watchdog output reset status boost v cc tle 6363 g output output output nf device type supplier remarks b82442-a1104 infineon 220 h; 0.24 a; 2.72 d 1 d 2 d bo d bu l bo l bu b82442-h2204 - baw78b baw78c baw78c infineon infineon - epcos epcos 100 h; 0.25 a; 1.28 schottky; 100 v; 1 a 200 v; 1 a; sot-89 200 v; 1 a; sot-89 100 v; 1 a; sot-89 ? ? schottky; 40 v; 1 a multiple ss14 bo d 100 h; 1.2 a; 0.28 ? coilcraft do3316p-104 l bo 220 h; 0.8 a; 0.61 ? do3316p-224 bu l coilcraft
tle 6363 data sheet rev. 1.2 23 2003-06-02 diagrams: oscillator and boos t/buck-converter performance in the following the behaviour of the boost/buck-converter and the oscillator is shown. oscillator frequenc y deviation vs. junction temperature boost feedback current vs. junction temperature aed02938 j t -15 ? f osc -10 -5 0 5 khz 10 -50 -25 0 25 50 75 100 ?c 150 j t = 25 ?c referred to f osc at aed02939 j t -700 -600 -500 -400 -300 na -200 -50 -25 0 25 50 75 100 ?c 150 fb i
tle 6363 data sheet rev. 1.2 24 2003-06-02 current consumption vs. junction temperature efficiency buck vs. load efficiency buck vs. boost voltage aed02940 j t 0.5 1 1.5 2 2.5 ma 3 -50 -25 0 25 50 75 100 ?c 150 boost i boost on buck on bo boost i = 0 ma = 0 ma cc i aed02942 load i 50 150 250 ma 65 70 75 80 85 % 90 rt, ht ct aed02941 boost v 65 5 15 25 v 30 70 75 80 85 90 % 95 v cc = 5 v load i = 120 ma 80 ma 40 ma
tle 6363 data sheet rev. 1.2 25 2003-06-02 efficiency boost vs. input voltage oscillator freque ncy vs. resistor from r to gnd boost output voltage vs. load boost and logic ou tput voltage vs. junction temperature aed02943 batt v 8 70 v 75 80 85 90 % 95 10 12 14 16 rt ct ht i boost = 60 ma aed02982 r 5 10 20 50 100 200 500 1000 osc f r 10 20 50 100 200 k 1000 ? j t = 25 ?c @ khz aed02944 load i 20 26 ma 27 28 29 30 v 31 40 60 80 100 boost v rt ht ct aed02983 -50 = 50 ma boost v j t boost i -25 0 25 50 75 100 ?c 150 4.950 4.975 5.000 5.025 v 26 27 28 29 30 v v cc = 250 ma i cc
tle 6363 data sheet rev. 1.2 26 2003-06-02 boost and buck on resistance vs. junction temperature boost and buck overcurrent threshold vs. junction temperature aed02984 -50 = 1 a j t boi i -25 0 25 50 75 100 ?c 150 0 100 200 300 600 700 800 1000 on r 400 500 m ? r boon @ = 1 a buon ri @ buo aed02985 -50 j t -25 0 25 50 75 100 ?c 150 0.8 i booc (boost-converter) i oc 0.9 1 1.1 1.2 1.3 1.4 a (buck-converter) i buoc
data sheet rev. 1.2 27 2003-06-02 tle 6363 package outlines p-dso-14-2 (plastic dual sm all outline package) gps05474 sorts of packing package outlines for tubes, trays etc. are contained in our data book ?package information? dimensions in mm smd = surface mounted device
tle 6363 edition 2003-06-02 published by infineon technologies ag, st.-martin-strasse 53, d-81541 mnchen, germany ? infineon technologies ag 2003. all rights reserved. attention please! the information herein is given to describe certain components and shall not be consid- ered as warranted characteristics. terms of delivery and rights to technical change reserved. we hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descrip- tions and charts stated herein. infineon technologies is an approved cecc manufacturer. information for further information on technology, deliv- ery terms and conditions and prices please contact your nearest infineon technologies office in germany or our infineon technolo- gies representatives worldwide (see ad- dress list). warnings due to technical requirements components may contain dangerous substances. for in- formation on the types in question please contact your nearest infineon technologies office. infineon technologies components may only be used in life-support devices or systems with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the fail- ure of that life-support device or system, or to affect the safety or effectiveness of that de- vice or system. life support devices or sys- tems are intended to be implanted in the hu- man body, or to support and/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered. data sheet rev. 1.2 28 2003-06-02

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